From 3c506c7a1c59ce83fea4fe8126ec05b098b7323d Mon Sep 17 00:00:00 2001 From: Kostya Shishkov Date: Sat, 27 Aug 2022 11:39:07 +0200 Subject: [PATCH 1/1] h264/mc: add a stub for using optimised implementations --- nihav-itu/src/codecs/h264/dsp/mc/debug.rs | 4 ++++ nihav-itu/src/codecs/h264/dsp/mc/mod.rs | 10 ++++++++-- nihav-itu/src/codecs/h264/dsp/mc/release.rs | 4 ++++ 3 files changed, 16 insertions(+), 2 deletions(-) diff --git a/nihav-itu/src/codecs/h264/dsp/mc/debug.rs b/nihav-itu/src/codecs/h264/dsp/mc/debug.rs index 9f773ac..34d59da 100644 --- a/nihav-itu/src/codecs/h264/dsp/mc/debug.rs +++ b/nihav-itu/src/codecs/h264/dsp/mc/debug.rs @@ -251,3 +251,7 @@ pub const H264_LUMA_INTERP: &[[super::MCFunc; 16]; 3] = &[ h264_mc30_16, h264_mc31_16, h264_mc32_16, h264_mc33_16 ] ]; + +impl super::RegisterSIMD for super::H264MC { + fn register_simd(&mut self) {} +} diff --git a/nihav-itu/src/codecs/h264/dsp/mc/mod.rs b/nihav-itu/src/codecs/h264/dsp/mc/mod.rs index 3ed248c..e2036cc 100644 --- a/nihav-itu/src/codecs/h264/dsp/mc/mod.rs +++ b/nihav-itu/src/codecs/h264/dsp/mc/mod.rs @@ -15,6 +15,10 @@ type MCFunc = fn (dst: &mut [u8], dstride: usize, src: &[u8], sstride: usize, h: fn clip_u8(val: i16) -> u8 { val.max(0).min(255) as u8 } +trait RegisterSIMD { + fn register_simd(&mut self); +} + pub struct H264MC { avg_buf: NAVideoBufferRef, pub put_block_weighted: [fn (dst: &mut [u8], stride: usize, src: &[u8], h: usize, wparams: [i8; 3]); 4], @@ -23,11 +27,13 @@ pub struct H264MC { impl H264MC { pub fn new(avg_buf: NAVideoBufferRef) -> Self { - Self { + let mut obj = Self { avg_buf, put_block_weighted: [put_blk_w_2, put_blk_w_4, put_blk_w_8, put_blk_w_16], put_block_weighted2: [put_blk_w2_2, put_blk_w2_4, put_blk_w2_8, put_blk_w2_16], - } + }; + obj.register_simd(); + obj } pub fn do_mc(&mut self, frm: &mut NASimpleVideoFrame, refpic: NAVideoBufferRef, xpos: usize, ypos: usize, w: usize, h: usize, mv: MV) { let mut ebuf = [0u8; 22 * 22]; diff --git a/nihav-itu/src/codecs/h264/dsp/mc/release.rs b/nihav-itu/src/codecs/h264/dsp/mc/release.rs index 3a43500..0a521d0 100644 --- a/nihav-itu/src/codecs/h264/dsp/mc/release.rs +++ b/nihav-itu/src/codecs/h264/dsp/mc/release.rs @@ -323,3 +323,7 @@ pub const H264_LUMA_INTERP: &[[super::MCFunc; 16]; 3] = &[ h264_mc30_16, h264_mc31_16, h264_mc32_16, h264_mc33_16 ] ]; + +impl super::RegisterSIMD for super::H264MC { + fn register_simd(&mut self) {} +} -- 2.39.5